ASICs - Application Specific Integrated Circuits

Below is an overview of the design, development and layout processes for ASIC – Application Specific Integrated Circuits.

Please Note: For ease of use this ASIC, Application Specific Integrated Circuit overview has been split into separate sections, with each section addressing a different aspect of ASIC technology. The sections are:

  • ASIC Overview
  • ASIC design and development stages
  • ASIC Conclusion


ASIC Overview

ASICs or Application Specific Integrated Circuits can be very costly to manufacture. As a result, it is necessary to ensure that the ASIC design and development process is undertaken in a logical and controlled manner. Each stage of this design and development process should be carefully monitored and every precaution needs to be taken to ensure that all ASIC design meets the requirement and operating standards of the client and product.

ASIC design and development stages

There are a number of stages in Application Specific Integrated Circuit, ASIC design. Each stage must follow the correct design procedures, because errors at a later stage become progressively more costly to correct. The ASIC development process should incorporate all the required design stages, and each stage should be 100% complete before the next stage is started. The 10 stages in ASIC design and development are:

ASIC requirements capture

It is essential that all ASIC requirements are captured so that the design can be implemented correctly. As has been mentioned, changes to the requirements at a later stage can and will result in a significant cost increases.

ASIC modelling

It is necessary to model the high level functionality of the ASIC design to ensure that the correct approach has been taken. This modelling is normally done in software, often in C or a similar language. In some circumstances it is possible to import the circuit block diagram into the design tool to enable the ASIC modelling to be undertaken.

Please Note: It is important at this stage to ensure that the truncation and rounding elements of the ASIC design are incorporated correctly. Any mismatch at this stage can be difficult to locate and correct and can create larger problems at a later stage.

ASIC package selection

The ASIC package selection is governed by 3 factors:

  1. The number of connections required by the type of ASIC
  2. The anticipated heat dissipations of ASIC. Higher levels of heat dissipation will require a package that can transfer the heat from the silicon very effectively.
  3. The manufacturing process for the circuit into which the ASIC is to be incorporated.

When choosing the most suitable ASIC package all three factors MUST be taken into consideration.

ASIC design capture

The design capture for the ASIC is usually achieved through two methods:

  1. By capturing the ASIC design from a schematic.
  2. By using design tools that capture the mathematical operations required and convert this into the required circuitry representation.

Designs are now usually captured using VHDL design tools and Verilog. This allows for better control over the ASIC design at both high and low levels and gives detailed design info down to the register by register or even the bit by bit level.

ASIC layout

The ASIC layout stage is an extremely important stage in ASIC development and the level of customisation of the ASIC layout will depend upon the type of ASIC being used. Please note that for full customised designs, the ASIC layout needs to be more flexible than normal.

The ASIC layout will involve many factors from the most convenient proximity of certain sections of the circuit and transit times, to the number of interconnections that need to be made between different areas. The ASIC layout is normally undertaken under computer control, but it is possible to place restrictions on the ASIC layout to ensure that certain electrical parameters are met.

ASIC simulation and comparison with modelling

Once the design of the ASIC has been captured, it is necessary to ensure that the design will meet all manufacturing requirements and will work as specified. This is done through ASIC product simulation. Additionally a careful check of the timing is essential, especially for full custom ASIC designs. This needs to be performed over slightly more than the specified temperature range, the power supply input range and the envisaged process variation.

Please Note: It is often found that many of the errors discovered in the final integrated circuits are functional errors that can be found and corrected at this stage.

ASIC formal verification

ASIC formal verification has become very important in recent year due to the growing complexity of ASIC designs. This includes checks to ensure that all the variables within the software model are correctly defined, as well as checking for aspects such as clock skew, and metastability between different clocked areas of the ASIC design.

ASIC test techniques

Once manufactured, it is necessary to test the ASIC device. Three techniques are normally considered for use when testing:

  1. The boundary scan, JTAG, IEEE1149.1. Using this technique it is possible to check the input/output areas, and also the internal circuitry within the device.
  2. Scan chains. This technique uses the existing registers from the ASIC and a number of chains can be set up, each having two inputs and an output chain. Test vectors are generated for the inputs and using these it is then possible to analyse the output and detect any errors. Automated scan chain input sequences can be generated and optimised to test all the logic between the registers to check for nodes that may be stuck in a particular state, i.e. 1 or 0.
  3. BIST - (Built In Self Test) may be used. This is particularly useful in situations such as the test of chips incorporating elements such as SRAM which take a long time to check. As these are very cost effective in terms of silicon area and test time. The technique and extent of these vectors can often influence the choice of vendor.

Please Note: The boundary scan is to slow to check many parts of a complex ASIC unit and is therefore not often used.

Physical test of prototype ASICs

When the physical prototype silicon ASICs are available it is necessary to give them a complete test, including a test with the ASIC in the target circuit. Not only is it necessary to check their operation, but in addition to this, checks of the process spread need to be undertaken to give an indication of the likely yield in production. The aim is a narrow spread that is not close to pass fail limit edges.

Please Note: It is possible that some problems could be found at this stage. To investigate the problems a number of techniques can be used including boundary scans and generating a hypothesis that can then be tested against the simulation of the ASIC. This enables the correct problem to be simulated and then corrected.

Lifecycle reviews & handover to manufacture

It is always necessary to have great communication through tried and tested official channels between the development team and the silicon vendor. To achieve this, the handover of information to and from the ASIC design service is normally done on a formal basis, and the silicon vendors will often expect to see many items including the verification results for the ASIC design, as part of this.


If the ASIC design process is undertaken carefully, it is almost always possible to:

  • reduce unit cost
  • improve unit performance
  • reduce unit size and volume
  • protect company knowledge

However if errors constantly occur, the ASIC development costs can increase because further ASIC design and development will be constantly required. Extreme care needs to be taken to ensure that this does not happen.

Here at alpha europe we can offer you all of this attention to detail and different design groups that have extensive experience in all stages of ASIC development, including:

  • Digital,
  • Analogue,
  • Mixed-signal,
  • Power and
  • RF

We have experience in all ASIC technologies from low voltage, low power sub-micron technologies up to high voltage high power (up to 700V) technologies including SOI. This includes work in the automotive, medical, home appliance, and consumer industries that demonstrates our expertise to satisfied customers worldwide.